Quick update. I have now two hardware platforms, one for each architecture, running a simplified, minimum version of Oberon RTS. The two platforms are “SD card swap compatible”, ie. from the point of view of the software they are the same, even if they are implemented differently. Apart from the different architecture, they are realised with different FPGAs, Xilinx Artix-7 and Altera Cyclone IV, respectively, and the boards are different as well:
The Artix-7 board: Digilent Arty A7-100T
The Cyclone IV board: Terasic DE2-112
However, after some “unification” effort, I can use most of my devices in the hardware – such as SPI interfaces, reset circuits, process timers, log circular buffer, stack overflow monitor, watchdog – with both architectures and technologies, which will make any further development so much easier, as I don’t need to create and keep two versions of the same hardware functionality. This unification was actually not difficult, it was more like one of these “ah, of course, this way” moments while not working on it. Not exactly in the shower this time, but you get the picture.
The repo is updated accordingly.
https://github.com/ygrayne/oberon-rts-hw
On the software side, I have prepared the aforementioned simplified Oberon RTS system. It lacks many of the modules of the full system, so they are not even in the repo yet. In the currently integrated modules, I have either simply commented out the relevant parts, or removed them. It’s not a pretty sight. No poetry. It’s more like a functioning mess right now.
I have published the software repo on GitHub as well: